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US patent granted for classifying cache misses

US 12,541,443, granted on February 3, 2026, covers a method that finds the instructions behind frequent cache misses and tells capacity, conflict and coherence misses apart. Teyon founder Tongping Liu is the lead inventor.

Hot instructions sampled from hardware counters, each cache miss classified as capacity, conflict or coherence

What the patent covers

The United States Patent and Trademark Office granted US 12,541,443, Classification of different types of cache misses, on February 3, 2026. The inventors are Tongping Liu, Teyon's CEO and technical founder, with Jin Zhou, Jiaxun Tang and Hanmei Yang. The application was filed on November 22, 2022, and the patent is assigned to the University of Massachusetts Amherst, where the work was done.

The method samples hardware performance counters coarsely to find the instructions that miss the cache most often, then uses fine-grained breakpoint sampling to record those instructions' memory access patterns and classify each miss as a capacity, conflict or coherence miss. Knowing which kind of miss a hot instruction suffers tells an engineer which fix applies: a different data layout, a different access order, or less sharing between cores.

Why it matters to us

Memory behavior that the hardware hides from the programmer is the problem Teyon works on. The granted patents naming our founder are listed on the Resources page.

Source: Google Patents, US12541443B2.

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